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typical connection half-bridge driver features ? floating channel designed for bootstrap operation fully operational to +600v tolerant to negative transient voltage dv/dt immune ? gate drive supply range from 10 to 20v ? undervoltage lockout for both channels ? 3.3v and 5v input logic compatible ? matched propagation delay for both channels ? logic and power ground +/- 5v offset. ? lower di/dt gate driver for better noise immunity ? output source/sink current capability 1.4a/1.8a description IR21834 ir2183 packages www.irf.com 1 v cc v b v s ho lo com hin lin lin hin up to 600v to load v cc hin up to 600v to load v cc v b v s ho lo com hin dt v ss lin v cc lin v ss r dt ir2183 ( 4 ) ( s ) data sheet no. pd60173-e (refer to lead assignment for correct pin configuration) this/these diagram(s) show electrical connections only. please refer to our application notes and designtips for proper circuit board layout. 14-lead pdip IR21834 8-lead soic ir2183s 14-lead soic IR21834s 8-lead pdip ir2183 the ir2183(4)(s) are high voltage, high speed power mosfet and igbt drivers with dependent high and low side referenced output channels. pro- prietary hvic and latch immune cmos technologies enable rugge- dized monolithic construction. the logic input is compatible with standard cmos or lsttl output, down to 3.3v logic. the output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. the floating channel can be used to drive an n-channel power mosfet or igbt in the high side configuration which operates up to 600 volts.

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ir2183 ( 4 ) ( s ) 2 www.irf.com symbol definition min. max. units v b high side floating absolute voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc low side and logic fixed supply voltage -0.3 25 v lo low side output voltage -0.3 v cc + 0.3 dt programmable dead-time pin voltage (IR21834 only) v ss - 0.3 v cc + 0.3 v in logic input voltage (hin & lin )v ss - 0.3 v ss + 10 v ss logic ground (IR21834 only) v cc - 25 v cc + 0.3 dv s /dt allowable offset supply voltage transient ? 50 v/ns p d package power dissipation @ t a +25c (8-lead pdip) ? 1.0 (8-lead soic) ? 0.625 (14-lead pdip) ? 1.6 (14-lead soic) ? 1.0 rth ja thermal resistance, junction to ambient (8-l ead pdip) ? 125 (8-lead soic) ? 200 (14-lead pdip) ? 75 (14-lead soic) ? 120 t j junction temperature ? 150 t s storage temperature -50 150 t l lead temperature (soldering, 10 seconds) ? 300 v c c/w w absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s and v ss offset rating are tested with all supplies biased at 15v differential. note 1: logic operational for v s of -5 to +600v. logic state held for v s of -5v to -v bs . (please refer to the design tip dt97-3 for more details). note 2: hin and lin pins are internally clamped with a 5.2v zener diode. vb high side floating supply absolute voltage v s + 10 v s + 20 v s high side floating supply offset voltage note 1 600 v ho high side floating output voltage v s v b v cc low side and logic fixed supply voltage 10 20 v lo low side output voltage 0 v cc v in logic input voltage (hin & lin )v ss v ss + 5 dt programmable dead-time pin voltage (IR21834 only) v ss v cc v ss logic ground (IR21834 only) -5 5 t a ambient temperature -40 125 c v symbol definition min. max. units
ir2183 ( 4 ) ( s ) www.irf.com 3 static electrical characteristics v bias (v cc , v bs ) = 15v, v ss = com, dt= v ss and t a = 25 c unless otherwise specified. the v il , v ih and i in parameters are referenced to v ss /com and are applicable to the respective input leads: hin and lin. the v o , i o and ron parameters are referenced to com and are applicable to the respective output leads: ho and lo. symbol definition min. typ. max. units test conditions v ih logic ? 1 ? input voltage for hin & logic ? 0 ? for lin 2.7 ?? v cc = 10v to 20v v il logic ? 0 ? input voltage for hin & logic ? 1 ? for lin ?? 0.8 v cc = 10v to 20v v oh high level output voltage, v bias - v o ?? 1.2 i o = 0a v ol low level output voltage, v o ?? 0.1 i o = 0a i lk offset supply leakage current ?? 50 v b = v s = 600v i qbs quiescent v bs supply current 20 60 150 v in = 0v or 5v i qcc quiescent v cc supply current 0.4 1.0 1.6 ma v in = 0v or 5v i in+ logic ? 1 ? input bias current ? 5 20 hin = 5v, lin = 0v i in- logic ? 0 ? input bias current ? 1 2 hin = 0v, lin = 5v v ccuv+ v cc and v bs supply undervoltage positive going 8.0 8.9 9.8 v bsuv+ threshold v ccuv- v cc and v bs supply undervoltage negative going 7.4 8.2 9.0 v bsuv- threshold v ccuvh hysteresis 0.3 0.7 ? v bsuvh i o+ output high short circuit pulsed current 1.4 1.9 ? v o = 0v, pw 10 s i o- output low short circuit pulsed current 1.8 2.3 ? v o = 15v, pw 10 s v a a v a dynamic electrical characteristics v bias (v cc , v bs ) = 15v, v ss = com, c l = 1000 pf, t a = 25 c, dt = vss unless otherwise specified. symbol definition min. typ. max. units test conditions t on turn-on propagation delay ? 180 270 v s = 0v t off turn-off propagation delay ? 220 330 v s = 0v or 600v mt delay matching | t on - t off | ? 035 t r turn-on rise time ? 40 60 v s = 0v t f turn-off fall time ? 20 35 v s = 0v dt deadtime: lo turn-off to ho turn-on(dt lo-ho) & 280 400 520 rdt= 0 ho turn-off to lo turn-on (dt ho-lo) 456 sec rdt = 200k (IR21834) mdt deadtime matching = | dt lo-ho - dt ho-lo | ? 0 50 rdt=0 ? 0 600 rdt = 200k (IR21834) nsec nsec
ir2183 ( 4 ) ( s ) 4 www.irf.com functional block diagrams 2183 lin +5v uv detect delay com lo vcc hin dt vss vs ho vb pulse filter hv level shifter r r s q uv detect deadtime & shoot-through prevention pulse generator vss/com level shift vss/com level shift 21834 lin uv detect delay hin dt vss vs ho vb pulse filter hv level shifter r r s q uv detect deadtime & shoot-through prevention pulse generator vss/com level shift vss/com level shift +5v com lo vcc
ir2183 ( 4 ) ( s ) www.irf.com 5 14-lead pdip 14-lead soic IR21834 IR21834s lead assignments 8-lead pdip 8-lead soic lead definitions symbol description hin logic input for high side gate driver output (ho), in phase (referenced to com for ir2183 and vss for IR21834) logic input for low side gate driver output (lo), out of phase (referenced to com for ir2183 and vss for IR21834) dt programmable dead-time lead, referenced to vss. (IR21834 only) vss logic ground (21834 only) v b high side floating supply ho high side gate driver output v s high side floating supply return v cc low side and logic fixed supply lo low side gate driver output com low side return lin ir2183 ir2183s 1 2 3 4 8 7 6 5 hin lin com lo v b ho v s v cc 1 2 3 4 8 7 6 5 hin lin com lo v b ho v s v cc 1 2 3 4 5 6 7 1 4 13 12 11 10 9 8 hin lin vss dt com lo v cc v b ho v s 1 2 3 4 5 6 7 1 4 13 12 11 10 9 8 hin lin vss dt com lo v cc v b ho v s
ir2183 ( 4 ) ( s ) 6 www.irf.com 01-6014 01-3003 01 (ms-001ab) 8-lead pdip 01-6027 01-0021 11 (ms-012aa) 8-lead soic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. out line conf orms t o jedec outline ms-012aa. not e s : 1. dimens ioning & t olerancing pe r as me y14.5m-1994. 2. cont rolling dimension: millimet er 3. dime ns ions ar e s hown in milli me t e rs [inche s ]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dime ns ion doe s not incl ude mold pr ot rus ions . 6 dime ns ion doe s not incl ude mold pr ot rus ions . mold protrusions not t o e xceed 0.25 [.010]. 7 dimension is t he length of lead for soldering to a subs trat e. mold protrusions not t o e xceed 0.15 [.006]. 0.25 [.010] c a b e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 bas ic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 b as ic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters inches min max dim 8 e c .0075 .0098 0.19 0.25 .025 bas ic 0.635 bas ic case outlines
ir2183 ( 4 ) ( s ) www.irf.com 7 01-6010 01-3002 03 (ms-001ac) 14-lead pdip 01-6019 01-3063 00 (ms-012ab) 14-lead soic (narrow body)
ir2183 ( 4 ) ( s ) 8 www.irf.com figure 1. input/output timing diagram figure 2. switching time waveform definitions lin ho lo hin ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 data and specifications subject to change without notice. 7/23/2001 figure 3. deadtime waveform definitions hin lin ho 50% 50% 90% 10% lo 90% 10% dt lo-ho dt lo-ho mdt= - dt ho-lo dt ho-lo hin lin 50% 50% 50% 50% t r t on t f t off lo 90% 90% 10% 10% t r t on t f t off ho 90% 90% 10% 10%

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